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HCTS245MS
September 1995
Radiation Hardened Octal Bus Transceiver, Three-State, Non-Inverting
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T20 TOP VIEW
DIR A0 A1 A2 A3 A4 A5 A6 A7 1 2 3 4 5 6 7 8 9 20 VCC 19 OE 18 B0 17 B1 16 B2 15 B3 14 B4 13 B5 12 B6 11 B7
Features
* 3 Micron Radiation Hardened CMOS SOS * Total Dose 200K RAD (Si) * SEP Effective LET No Upsets: >100 MEV-cm2/mg * Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) * Dose Rate Survivability: >1 x 1012 RAD (Si)/s * Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse * Latch-Up Free Under Any Conditions * Fanout (Over Temperature Range) - Bus Driver Outputs - 15 LSTTL Loads * Military Temperature Range: -55
oC
to
+125oC
* Significant Power Reduction Compared to LSTTL ICs * DC Operating Voltage Range: 4.5V to 5.5V * LSTTL Input Compatibility - VIL = 0.8V Max - VIH = VCC/2 Min * Input Current Levels Ii 5A at VOL, VOH
GND 10
Description
The Intersil HCTS245MS is a Radiation Hardened NonInverting Octal Bidirectional Bus Transceiver, Three-State, intended for two-way asynchronous communication between data busses. The HCTS245MS allows data transmission from the A bus to the B bus or from the B bus to the A bus. The logic level at the direction input (DIR) determines the data direction. The output enable input (OE) puts the I/O port in the high-impedance state when high. The HCTS245MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS245MS is supplied in a 20 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
20 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F20 TOP VIEW
DIR A0 A1 A2 A3 A4 A5 A6 A7 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC OE B0 B1 B2 B3 B4 B5 B6 B7
Ordering Information
PART NUMBER HCTS245DMSR HCTS245KMSR HCTS245D/Sample HCTS245K/Sample HCTS245HMSR TEMPERATURE RANGE -55oC to +125oC -55oC to +125oC +25oC +25oC +25oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample Sample Die PACKAGE 20 Lead SBDIP 20 Lead Ceramic Flatpack 20 Lead SBDIP 20 Lead Ceramic Flatpack Die DB NA
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
Spec Number File Number
614
518615 2360.2
HCTS245MS Functional Diagram
ONE OF 8 TRANSCEIVERS P N P B DATA 11 (18, 17, 16, 15, 14, 13, 12) N TO OTHER 7 CIRCUITS 9 (2, 3, 4, 5, 6, 7, 8) A DATA
DIR 1 OUTPUT ENABLE 19
TRUTH TABLE CONTROL INPUTS OE L L H DIR L H X OPERATION B Data to A Bus A Data to B Bus Isolation
H = High Voltage Level, L = Low Voltage Level, X = Immaterial To prevent excess currents in the High-Z (Isolation) modes, all I/O terminals should be terminated with 10k to 1M resistors.
Spec Number 615
518615
Specifications HCTS245MS
Absolute Maximum Ratings
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .10mA DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .25mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance JA JC SBDIP Package. . . . . . . . . . . . . . . . . . . . 72oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 107oC/W 28oC/W Maximum Package Power Dissipation at +125oC Ambient SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.69W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.47W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.9mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 9.3mW/oC
CAUTION: As with all semiconductors, stress listed under "Absolute Maximum Ratings" may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under "Electrical Performance Characteristics" are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . .500ns Max Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2, 3 Output Current (Sink) IOL VCC = 4.5V, VIH = 4.5V, VOUT = 0.4V, VIL = 0V 1 2, 3 Output Current (Source) IOH VCC = 4.5V, VIH = 4.5V, VOUT = VCC -0.4V, VIL = 0V VCC = 4.5V, VIH = 2.25V, IOL = 50A, VIL = 0.8V VCC = 5.5V, VIH = 2.75V, IOL = 50A, VIL = 0.8V Output Voltage High VOH VCC = 4.5V, VIH = 2.25V, IOH = -50A, VIL = 0.8V VCC = 5.5V, VIH = 2.75V, IOH = -50A, VIL = 0.8V Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND 1 2, 3 1, 2, 3 LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC, +125oC, -55oC MIN 7.2 6.0 -7.2 -6.0 MAX 40 750 0.1 UNITS A A mA mA mA mA V
PARAMETER Quiescent Current
SYMBOL ICC
(NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND
Output Voltage Low
VOL
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
1, 2, 3
+25oC, +125oC, -55oC
VCC -0.1 VCC -0.1 -
-
V
1, 2, 3
+25oC, +125oC, -55oC
-
V
1 2, 3
+25oC +125oC, -55oC +25oC +125oC, -55oC +25oC, +125oC, -55oC
0.5 5.0 1 50 -
A A A A -
Three-State Output Leakage Current
IOZ
VCC = 5.5V, Applied Voltage = 0V or VCC
1 2, 3
Noise Immunity Functional Test NOTES:
FN
VCC = 4.5V, VIH = 2.25V, VIL = 0.8V (Note 2)
7, 8A, 8B
1. All voltages reference to device GND. 2. For functional tests VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
Spec Number 616
518615
Specifications HCTS245MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 9 10, 11 TPHL VCC = 4.5V 9 10, 11 Enable to Output TPZL VCC = 4.5V 9 10, 11 TPZH VCC = 4.5V 9 10, 11 Disable to Output TPLZ TPHZ VCC = 4.5V 9 10, 11 NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V. LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 2 2 2 2 2 2 2 2 2 2 MAX 18 21 21 24 28 33 26 31 28 33 UNITS ns ns ns ns ns ns ns ns ns ns
PARAMETER Propagation Delay Data to Output
SYMBOL TPLH
(NOTES 1, 2) CONDITIONS VCC = 4.5V
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Capacitance Power Dissipation SYMBOL CPD CONDITIONS VCC = 5.0V, f = 1MHz NOTES 1 1 Input Capacitance CIN VCC = 5.0V, f = 1MHz 1 1 Output Transition Time TTHL TTLH VCC = 4.5V 1 1 NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. TEMPERATURE +25oC +125oC, -55oC +25oC +125oC +25oC +125oC, 55oC MIN MAX 68 68 10 10 12 18 UNITS pF pF pF pF ns ns
Spec Number 617
518615
Specifications HCTS245MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS 200K RAD LIMITS PARAMETER Quiescent Current Output Current (Sink) SYMBOL ICC IOL (NOTES 1, 2) CONDITIONS VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIN = VCC or GND, VOUT = 0.4V VCC = 4.5V, VIN = VCC or GND, VOUT = VCC -0.4V VCC = 4.5V and 5.5V, VIH = VCC/2, VIL = 0.8V, IOL = 50A VCC = 4.5V and 5.5V, VIH = VCC/2, VIL = 0.8V, IOH = -50A VCC = 5.5V, VIN = VCC or GND Applied Voltage = 0V or VCC, VCC = 5.5V TEMPERATURE +25oC +25oC MIN 6.0 MAX 0.75 UNITS mA mA
Output Current (Source) Output Voltage Low
IOH
+25oC
-6.0
-
mA
VOL
+25oC
-
0.1
V
Output Voltage High
VOH
+25oC
VCC -0.1 -
-
V
Input Leakage Current Three-State Output Leakage Current Noise Immunity Functional Test Propagation Delay Data to Output
IIN IOZ
+25oC +25oC
5 50
A A
FN
VCC = 4.5V, VIH = 2.25V, VIL = 0.8V, (Note 3) VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V
+25oC
-
-
-
TPLH TPHL
+25oC +25oC +25oC +25oC
2 2 2 2 2
21 24 33 31 33
ns
Enable to Output
TPZL TPZH
ns ns ns
Disable to Output
TPLZ TPHZ
NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V. 3. For functional tests VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC) GROUP B SUBGROUP 5 5 5
PARAMETER ICC IOL/IOH IOZL/IOZH
DELTA LIMIT 12A -15% of 0 Hour 200nA
Spec Number 618
518615
Specifications HCTS245MS
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 Subgroup B-6 Group D METHOD 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 Sample/5005 Sample/5005 Sample/5005 Sample/5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 7, 9 Subgroups 1, 2, 3, 9, 10, 11 ICC, IOL/H, IOZL/H READ AND RECORD ICC, IOL/H, IOZL/H ICC, IOL/H, IOZL/H ICC, IOL/H, IOZL/H
NOTE: 1. Alternate Group A Testing in accordance with Method 5005 of MIL-STD-883 may be exercised.
TABLE 7. TOTAL DOSE IRRADIATION TEST CONFORMANCE GROUPS Group E Subgroup 2 METHOD 5005 PRE RAD 1, 7, 9 POST RAD Table 4 READ AND RECORD PRE RAD 1, 9 POST RAD Table 4 (Note 1)
NOTE: 1. Except FN test which will be performed 100% Go/No-Go.
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS OSCILLATOR OPEN GROUND 1/2 VCC = 3V 0.5V VCC = 6V 0.5V 50kHz 25kHz
STATIC BURN-IN I TEST CONNECTIONS (Note 1) 2-9 1, 10 - 19 20 -
STATIC BURN-IN II TEST CONNECTIONS (Note 1) 10 1 - 9, 11 - 20 -
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2) NOTES: 1. Each pin except VCC and GND will have a resistor of 10k 5% for static burn-in 2. Each pin except VCC and GND will have a resistor of 680 5% for dynamic burn-in 10 11 - 18 1, 20 2-9 19
TABLE 9. IRRADIATION TEST CONNECTIONS OPEN GROUND 10 VCC = 5V 0.5V 1 - 9, 11 - 20
NOTE: Each pin except VCC and GND will have a resistor of 47K 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 619
518615
HCTS245MS Intersil Space Level Product Flow - `MS'
Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method 2011 Sample - Die Shear Monitor, Method 2019 or 2027 100% Internal Visual Inspection, Method 2010, Condition A 100% Temperature Cycle, Method 1010, Condition C, 10 Cycles 100% Constant Acceleration, Method 2001, Condition per Method 5004 100% PIND, Method 2020, Condition A 100% External Visual 100% Serialization 100% Initial Electrical Test (T0) 100% Static Burn-In 1, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 2 (T2) 100% Delta Calculation (T0-T2) 100% PDA 1, Method 5004 (Notes 1and 2) 100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or Equivalent, Method 1015 100% Interim Electrical Test 3 (T3) 100% Delta Calculation (T0-T3) 100% PDA 2, Method 5004 (Note 2) 100% Final Electrical Test 100% Fine/Gross Leak, Method 1014 100% Radiographic, Method 2012 (Note 3) 100% External Visual, Method 2009 Sample - Group A, Method 5005 (Note 4) 100% Data Package Generation (Note 5)
NOTES: 1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1. 2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures from subgroup 7. 3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004. 4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005. 5. Data Package Contents: * Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity). * Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage. * GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read and Record data on file at Intersil. * X-Ray report and film. Includes penetrometer measurements. * Screening, Electrical, and Group A attributes (Screening attributes begin after package seal). * Lot Serial Number Sheet (Good units serial number and lot number). * Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. * The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative.
AC Timing Diagrams
VIH VS VIL TPLH
AC Load Circuit
DUT
INPUT
TEST POINT CL RL
TPHL VOH VS VOL VOH VOL TTLH 80% 20% 80% 20% TTHL OUTPUT CL = 50pF RL = 500
OUTPUT
AC VOLTAGE LEVELS PARAMETER VCC VIH VS VIL GND HCTS 4.50 3.00 1.30 0 0 UNITS V V V V V
Spec Number 620
518615
HCTS245MS Three-State Low Timing Diagrams
VIH VS VIL TPZL TPLZ VOZ VT VOL CL CL = 50pF OUTPUT VW DUT TEST POINT RL INPUT
Three-State Low Load Circuit
VCC
THREE-STATE LOW VOLTAGE LEVELS PARAMETER VCC VIH VS VT VW GND HCTS 4.50 3.00 1.30 1.30 0.90 0 UNITS V V V V V V
RL = 500
Three-State High Timing Diagrams
VIH VS VIL TPZH TPHZ VOH VT VOZ OUTPUT VW INPUT
Three-State High Load Circuit
DUT TEST POINT
RL
CL = 50pF RL = 500
THREE-STATE HIGH VOLTAGE LEVELS PARAMETER VCC VIH VS VT VW GND HCTS 4.50 3.00 1.30 1.30 3.60 0 UNITS V V V V V V
Spec Number 621
518615
HCTS245MS Die Characteristics
DIE DIMENSIONS: 124 x 110 mils METALLIZATION: Type: SiAl Metal Thickness: 11kA 1kA GLASSIVATION: Type: SiO2 Thickness: 13kA 2.6kA WORST CASE CURRENT DENSITY: <2.0 x 105A/cm2 BOND PAD SIZE: 100m x 100m 4 mils x 4 mils
Metallization Mask Layout
HCTS245MS
(20) VCC
A0 (2)
(19) OE
(1) DIR
NC
NC
NC
NC
(18) B0 A1 (3)
(17) B1
A2 (4) (16) B2
A3 (5) (15) B3
A4 (6)
(14) B4
A5 (7)
(13) B5
GND (10)
NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location. The mask series for the HCTS245 is TA14417A.
B6 (12)
A6 (8)
A7 (9)
B7 (11)
Spec Number 622
518615
HCTS245MS
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
Spec Number 623

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